Search options

Ok, it's been a while... :-)
A while after my last post, I received the PCBs and tested the CPLD design, and it had some bugs that made games work badly or not work at all, and the save games were also not working, so I redid the design several times, with no luck, looking at the MBC5 as a black box is difficult, but the problem was me, I was not discovering what I was doing bad, so I got frustated and stopped for a while. I tried to make it work from time to time, but I had several other projects and started a new job, so things got stalled.
Some days ago I tried again, searching information I found some guy at the nesdev forums also trying to make the MBC5 clone and a flashcart, so we talked a bit, and I remembered that I have a working flashcart with a mbc1 clone (just the rom mapping) using standard 74xxx logic chips. So i started from that design, and today I got it to work. I tried Super Mario Bros Deluxe DX and Zelda DX and both worked perfect, with savegames and everything.
I'll update soon, I'm going to test it a bit more, but I think it is a big milestone for this humble project. I'll make the MBC5 clone opensource as promised, so keep tuned.
Now I have to fix some errors I had on the prototype PCBs, order a new batch, and test everything, but I'm really happy right now!

For the future I'll try to make a new design using 3.3v logic, that will enable us to use modern and on stock components (it's been a pain finding 5v flash chips), but for now I'll publish what I have righ now in a few days, once I'm sure the MBC5 clone implementation  works perfect.

Expect a video soon!

I am testing the LED thing. I'm using bit 7 in 3000h-3FFFh register (high rom bank, only bit 0 is used in original MBC5), to control the LED.
Program is a simple timer, that changes the LED status each second:

http://www.vimeo.com/17726336

Next step, sending this to manufacture:

About designing the clone, yes, it was a combo between reading existing documentation and some reverse engineering  to get an idea of what it has to do,  and then designing a logic circuit that does that.
First, I designed it in a notebook using gates and registers, and then after having a global picture of the design, started coding it in VHDL.
I think I have a picture...

:-)

About consumption, Xilinx CPLDs are very nice, not used macrocells are turned off to save power, and you can also use some other tricks if timing is not critical.